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Home > Solutions > Verification IP > e Verification Components > JTAG eVC > Features & Benefits

JTAG eVC Features & Benefits


  • Written in e and fully compatible with Specman Elite - HDL independent
  • eRM compliant - Plug-n-Play
  • Support for advanced Verification Process Automation (VPA) integration
  • Functional coverage analysis for Coverage-Driven Verification (CDV)
  • Fully compatible with the IEEE 1149.1-2001 Standard Test Access Port (TAP) and Boundary Scan Architecture (BSA) standard
  • Sequence generation at different levels of abstraction including Transactions (e.g. load instruction) or Tests (e.g. EXTEST behavior)
  • Integrated Bus Functional Model (BFM) complies to JTAG rules for transmission of test vectors and facilitates error injection
  • Automated protocol and data checking at TAP ports and chain cells using an internal reference model (e.g. verify TCLK freeze)
  • Support for verifying a daisy chain of an arbitrary number of JTAG TAPs and BSAs
  • Functional coverage analysis view per single TAP or for complete TAP chain
  • Pre-built support for arbitrary user-defined registers and instructions
  • Integration into high level test plan by means of a vManager™ vPlan.
  • Automated configuration using Boundary Scan Description Language (BSDL) files


  • Proven technology: Fully verify the most available and interoperable DFT standard using the most advanced and reliable verification platform, Cadence's Specman Elite
  • Advanced VPA: Enter the age of Verification Process Automation and take advantage of advanced management features such as vPlans and multiple viewports
  • Applicability: Verifiy virtually any JTAG test architecture
  • Go Beyond the TAP: Elevate to test infrastructure verification and fully exercise and cover boundary cells, internal chains and other DFT elements
  • Multiple Instances: Verify multiple chains of JTAG implementations using multiple eVC instances.
  • Layered Monitoring: Observe behavior in environments ranging from white-box to black-box
  • Flexibility: Ensure that all configuration options within the standard can be satisfied
  • Extensibility: Extensive built-in support for user defined extensions
  • Reusability: Apply the environment across providers, projects and hardware description levels
  • Advanced Automation: Co-verification with Test Information Models


Product Info
Availability: Now
Version: 1.0
Download JTAG eVC Datasheet
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