UART 16x50 eVC Features & Benefits
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Features - Written in e and fully compatible with Specman Elite and SpeXsim
- Fully compatible with industry standard 16550, 16650, 16750 and 16950 A-D UART devices
- Support for up to 128-byte transmission/reception FIFOs
- Device-level: Provides generation and monitoring tools at both the serial and processor-bus interfaces with device-level temporal and data checkers
- Serial interface agent provides constrained random UART frame sequence generation with error injection
- Programmable serial interface characteristics with hardware (auto) flow support
- Fault start bit and break indication detection
- Processor Driver Abstraction Layer architecture provides high-level generation tools for test writing and monitoring at the processor bus interface
- Independently controlled and fully prioritized interrupt handling and DMA support
- Built-in coverage analysis for Coverage-Driven Verification (CDV)
- Complete and configurable error reporting, adjustable levels of tracing and verbosity
Benefits - Complete solution: The eVC provides a full verification environment for true device-level testing
- Highly applicable: Support all 16550, 16650, 16750 and 16950 devices
- High maturity: First released in 2002, this eVC has now been used in a variety of projects leading to successful silicon
- Best-in-class support: Free Silver-Class technical support for the duration of the License Term
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