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Home > Solutions > Verification IP > e Verification Components > IEEE 1500 eVC > Features & Benefits

IEEE 1500 eVC Features & Benefits


  • Written in e and fully compatible with Specman Elite - HDL independent
  • eRM compliant - Plug-n-Play
  • Support for advanced Verification Process Automation (VPA) integration
  • Functional coverage analysis for Coverage-Driven Verification (CDV)
  • Fully compatible with the IEEE 1500-2005 Standard for Embedded Core Test, enabling complete Test Infrastructure Verification
  • Supports advanced IEEE 1500-2005 test architecture features such as serial/parallel Test Access Mechanisms, multiple Cell Shift Stages and multiple Instruction Modes
  • Sequence generation at different levels of abstraction including primitives, instructions and tests (high-level compliance library)
  • Integrated Bus Functional Model (BFM) complies to SECT rules for transmission of test vectors and optional injection of control signal errors
  • Protocol and data checking at mandatory TAM ports using an internal reference model
  • BFM option to drive input sequences in JTAG mode
  • Support for verifying a daisy chain of multiple wrappers using multiple passive agents
  • Automated support for arbitrary user-defined Registers (Wrapper Data Registers / Core Data Registers) and Instructions


  • Cutting edge: Verify cutting edge IEEE 1500 technology on the most advanced and reliable verification platform, Cadence's Specman Elite
  • Advanced VPA: Enter the age of Verification Process Automation and take advantage of advanced management features such as vPlans and multiple viewports
  • Applicability: Verifiy virtually any 1500-compliant test architecture
  • Core and Coreless Operation: Verify a wrapper with and without a core
  • Single and Multi-wrapper Operation: The ability to verify a standalone wrapper and an IEEE 1500 daisy chain of wrappers.
  • Layered Monitoring: Observe behavior in environments ranging from white-box to black-box
  • Flexibility: Ensure that all configuration options within the standard can be satisfied
  • Extensibility: Provide as much support for user defined extensions as possible
  • Reusability: Apply the environment across providers, projects and hardware description levels
  • Enhanced Automation: Co-verification with Test Information Models


Product Info
Availability: Released
Version: 1.0
Download IEEE 1500 eVC datasheet
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