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Verisity's worldwide seminar series will introduce you to a suite of verification systems that automate the complete process of verification from the block, chip, system and project level. These seminars are technical in nature and take a step-by-step look at the entire verification flow from specification to closure. We’ll begin by developing a verification plan, and from there move into architectural exploration using TLM, RTL module-level verification, system-level verification and overall project management. The seminar will also introduce Verisity's newest hardware-based platform solutions that includes Xtreme® II and recently announced SpeXtreme high-performance chip and system-level acceleration/emulation.
Featuring Verification Process Automation (VPA) Systems from Verisity
- SpeXsim™: Block and chip-level verification and simulation system
- SpeXtreme™: High-performance chip and system-level acceleration and system-level emulation
- vManager™: Project-level process and verification closure management
- eVC and eRM™: Reusable plug-and-play verification components and a thorough reuse methodology
- Xtreme II: Easily adoptable, most flexible accelerated verification environment available today
Who Should Attend
The leaders in verification developed this seminar for engineers with varying degrees of knowledge in design and verification searching for the most complete and flexible solutions available. Managers and engineers who are responsible for design and verification of SoCs, hardware and software systems and working within or managing geographically distributed verification activities are highly encouraged to attend.
Agenda
9:00 – 9:10 Welcome and introduction
9:10 – 9:20 Creating the verification plan
9:20 – 9:30 Verifying the architectural model
9:30 – 10:30 Verifying RTL modules
10:30 – 10:45 Demo – Block-level
verification with SpeXsim
10:45 – 11:00 Break
11:00 – 11:45 Verifying chips and systems
11:45 – 12:45 Lunch
12:45 – 1:30 Accelerating verification
1:30 – 1:50 Demo – Verification acceleration
with SpeXtreme and in-circuit
emulation with Xtreme II
1:50 – 2:10 Automating verification
project management
2:10 – 2:30 Demo – vManager
2:30 – 2:45 Break
2:45 – 3:30 Novas – Advanced Debug Techniques
for System Verification
Environments
3:30 – 3:45 Summary
Seminar Schedule
NORTH AMERICA
September 14 Irvine, CA
September 15 San Diego, CA
September 21 Santa Clara, CA
October 4 Toronto, Canada
October 7 Boston, MA
October 12 Columbia, MD
October 14 Denver, CO
October 19 Dallas, TX
October 21 Austin, TX
EUROPE
October 18 Lund, Sweden
October 19 Munich, Germany
October 20 Oxfordshire, UK
October 21 Grenoble, France
ASIA
September 1 Shanghai, China
September 3 Beijing, China
September 9 Hsinchu, Taiwan
October 21 Osaka, Japan
October 26 Tokyo, Japan
October 28 Seoul, Korea
November 2 Bangalore, India
Don’t miss this opportunity to see the latest from the leaders in verification—Verisity
To Sign up for this FREE technical seminar:
http://www.verisity.com/seminar2004/semreg.php
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