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Q&A: Why The e Verification Language Is Alive And Well
(Fri, 19 Feb 2010 20:40:12)
[ eVCs | SBT&D ]
This article describes the test wrapper implementation of a popular embedded microprocessor, along with an automated approach for verifying the wrapper's compliance to the standard.
Cadence Introduces Universal Verification Components
(Mon, 07 Aug 2006 03:24:28)
[ Cadence VPA | Papers ]
In this article, publised in the Cadence Incisive Newsletter, we discuss the clear advantages Scenario Builder offers to the VIP ecosystem, as well as how VIP providers can leverage Scenario Builder to extend benefits to the end user.
[ Cadence VPA | Papers ]
Project management and automation are quickly becoming the most critical elements in the overall design and verification process. The most effective verification management strategy requires that design teams focus on some key features for success.

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"Globetech is a [Cadence] premier Verification Alliance Partner with years of verification expertise, complemented by readily available verification IP. They substantially improve customers' time to productivity, and give them greater confidence in first-pass success."

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